SkatterBencher #83: Core Ultra 5 245K Overclocked to 5633 MHz

We overclock the Intel Core Ultra 5 245K to 5633 MHz with the ASUS ROG Strix Z890-I Gaming motherboard and AIO liquid cooling.
We do this by exploring several of the Arrow Lake overclocking tools which I previously covered on this website. In this guide, I break down the Core Ultra 5 245K tuning process into six unique overclocking strategies for beginner and advanced overclockers.
- First, we enable ASUS Advanced OC Profile, ASUS MCE, and Intel XMP.
- Second, we do a basic tune of the CPU Cores with Turbo Ratio Limit.
- Third, we optimize the memory subsystem.
- Fourth, we maximize the CPU core overclock by overriding the voltage limits.
- Fifth, we tune the DRAM timings.
- Lastly, we switch to Power Gate mode to see if it makes a real-world difference.
It is my very first Arrow Lake overclocking guide, so I wasn’t quite sure how to cover as much as possible without taking too much of your time. I suspect this will be a very long article, so please bear with me. Anyway, before we jump into overclocking, let us quickly review our system, the benchmarks, and the stock performance.
Table of Contents
Intel Core Ultra 5 245K: Introduction
The Intel Core Ultra 5 245K is part of Intel’s Core Ultra 200S product line codenamed “Arrow Lake.” The Arrow Lake desktop processors for enthusiasts were introduced on October 24, 2024.

The Core Ultra 5 245K succeeds the 14-core Raptor Lake Core i5-14600K which we unfortunately didn’t get to overclock on this this website. It has a P-core base clock of 4.2 GHz and a listed boost frequency of up to 5.2 GHz. The E-cores can boost up to 4.6 GHz. The maximum rated power is 159W.
Platform Overview
The system we’re overclocking today consists of the following hardware.
Item | SKU | Price (USD) |
CPU | Intel Core Ultra 5 245K | 480 |
Motherboard | ASUS ROG Strix Z890-I Gaming WiFi | 450 |
CPU Cooling | Enermax LIQMAXFLO 420 | 115 |
Memory | G.SKILL Trident Z5 DDR5-7800 32GB | 160 |
Power Supply | XPG Fusion 1600W Titanium | 600 |
Graphics Card | ASUS ROG Strix RTX 2080 TI | 500 |
Storage | AGI 512GB NVMe M.2 Gen3 | 75 |
Chassis | Open Benchtable V2 | 200 |
Telemetry | BENCHLAB | 200 |
Benchmark Software
We use Windows 11 and the following benchmark applications to measure performance and ensure system stability.
Intel Core Ultra 5 245K: Stock Performance
Before starting overclocking, we must check the system performance at default settings.
In the past, there was some confusion about what constitutes default settings for Intel processors. For Arrow Lake, Intel spent extra resources clarifying to industry and media partners what constitutes default settings.
Arrow Lake Default Settings
Intel defines three power profiles for the Arrow Lake processors: baseline, performance, and extreme.
- The Baseline profile is provided for systems or motherboards with inadequate power delivery requirements to meet the performance profile. You can typically find it referenced as “Intel Default Baseline Profile.”
- The Performance profile is recommended by Intel as the default profile for most systems. In particular, high-end motherboards or gaming systems. You can typically find it referenced as “Intel Default Performance Profile.”
- The Extreme profile is provided as guidance to system designers or motherboards that intend to support overclocking. This profile is not validated by Intel and, when used, may void warranty terms.
The default settings must be in place on the first boot, after a BIOS update, or when a new CPU is installed. When users change the default settings, there should be a BIOS warning informing the users that the settings deviate from the Intel default settings.
For the purpose of this guide, we follow Intel’s direction and rely on the Performance profile for the default settings.
Core Ultra 5 245K Performance Profile
The Intel Default Performance Profile configuration parameters for Arrow Lake CPUs are as follows:
Parameter | Configuration |
CEP (Current Excursion Protection) | Enable |
TVB (Thermal Velocity Boost) | Enable |
TVB Voltage Optimizations | Enable |
DLVR Bypass | Disable |
ICCMax Unlimited | Disable |
TjMax Offset | 0 |
Turbo Ratio Limit Override | No changes |
C-states | Enable |
Enhanced C-states (C1E) | Enable |
AC Load Line | AC Load Line is within verified design specs |
DC Load Line | DC Load Line = AC Load Line |
The Intel Default Performance Profile Turbo Boost 2.0 parameters for the Core Ultra 5 245K are as follows:
Parameter | Baseline | Performance | Extreme |
ICCMax | 203 A | 242 A | N/A |
ICCMax_App | 140 A | 174 A | N/A |
Power Limit 1 (PL1) | 125 W | 159 W | N/A |
Power Limit 2 (PL2) | 125 W | 159 W | N/A |
Power Limit 4 (PL4) | 243 W | 305 W | N/A |
The Turbo Ratio Limit parameters for the Core Ultra 5 245K are as follows:
Parameter | Ratio |
Up to 2 active P-cores | 52X |
Up to 6 active P-cores | 50X |
Up to 8 active E-cores | 46X |
Ring | 38X |
NGU | 26X |
D2D | 21X |
Here is the benchmark performance at stock:



When running the OCCT CPU AVX2 Stability Test, the average CPU P-core effective clock is 4999 MHz with 1.099 volts and the average CPU E-core effective clock is 4473 MHz with 1.066 volts. The average CPU temperature is 62.0 degrees Celsius. The average CPU package power is 127.8 watts.

When running the OCCT CPU SSE Stability Test, the average CPU P-core effective clock is 4992 MHz with 1.097 volts and the average CPU E-core effective clock is 4541 MHz with 1.073 volts. The average CPU temperature is 61.0 degrees Celsius. The average CPU package power is 118.9 watts.

Of course, we can increase the performance by unlocking power limits and overclocking the system. However, before we get going, make sure to locate the CMOS Clear Jumper. Shorting the Clear CMOS jumper will reset all your BIOS settings to default, which is helpful if you want to start your BIOS configuration from scratch.

OC Strategy #1: ASUS Advanced OC Profile + ASUS MCE + Intel XMP
In our first overclocking strategy, we take advantage of the ASUS Advanced OC Profile, enable MultiCore Enhancement, and rely on Intel Extreme Profile technology.
ASUS Advanced OC Profile
As I mentioned earlier, Intel has clarified the rules of engagement by defining what constitutes default settings. In doing so, it created stricter rules for default BIOS settings but also opened up new avenues for innovation. One such innovation is the ASUS Advanced OC Profile.

In essence, the ASUS Advanced OC Profile set up the BIOS so it’s ready for overclocking. Not only does it reconfigure some of the parameters included in the definition of Intel’s Default Profiles, but it also configures a number of other settings related to power-saving, performance limiters, and so on.
By modifying some parameters, it’s possible to improve the system performance. Most importantly for our guide, however, you’re required to switch to the Advanced OC Profile for any kind of overclocking.
Intel Turbo Boost 2.0 Power Limits
Intel Turbo Boost 2.0 Technology allows the processor cores to run faster than the base operating frequency if the processor is operating below rated power, temperature, and current specification limits. The ultimate advantage is opportunistic performance improvements in both multi-threaded and single-threaded workloads.
The turbo boost algorithm works according to an EWMA formula. This stands for Exponentially Weighted Moving Average.

There are three main parameters to consider: PL1, PL2, and Tau.
- Power Limit 1, or PL1, is the threshold that the average power will not exceed. Historically, this has always been set equal to Intel’s advertised TDP. Very importantly, PL1 should not be set higher than the thermal solution cooling limits.
- Power Limit 2, or PL2, is the maximum power the processor is allowed to use for a limited amount of time.
- Tau is a weighing constant used in the algorithm to calculate the moving average power consumption. Tau, in seconds, is the time window for calculating the average power consumption. If the average power consumed is higher than PL1 the CPU will reduce the CPU frequency.
Turbo Boost 2.0 Technology has evolved over the past years to incorporate a lot of power, thermal, and electrical performance limiters, including PL3, PL4, IccMax, TCC_Offset, VR_TDC, RATL, Pmax, and many more.
An easy ASUS MultiCore Enhancement option on ASUS motherboards allows you to unleash the Turbo Boost power limits. Set the option to Enabled – Remove All Limits and enjoy maximum performance. Enabling ASUS MultiCore Enhancement adjusts the following parameters:
Parameter | Baseline | Performance | Extreme | ASUS MCE |
ICCMax | 203 A | 242 A | N/A | 0 |
ICCMax_App | 140 A | 174 A | N/A | 0 |
Power Limit 1 (PL1) | 125 W | 159 W | N/A | 4095 |
Power Limit 2 (PL2) | 125 W | 159 W | N/A | 4095 |
Power Limit 4 (PL4) | 243 W | 305 W | N/A | 0 |
Intel Extreme Memory Profile 3.0
Intel Extreme Memory Profile 3.0 is the new XMP standard for DDR5 memory and is the successor to XMP 2.0 for DDR4 memory. It was introduced together with the Alder Lake processors in 2021. It is largely based on the XMP 2.0 standard but has additional functionality.

The XMP 3.0 standard is designed with six sections. One global section describes the generic data that is used across all profiles. The other five sections are designed for five profiles respectively.
- Profile 1 is meant for the performance profile (this is the standard XMP as we know it)
- Profile 2 is designed for the extreme settings (this could be a higher frequency at higher voltage)
- Profile 3 is designed for the fastest settings (this could be tighter timings at higher voltage)
- Profiles 4 and 5 are rewritable and meant for user custom settings
Each profile has a wide range of configurable fields related to voltage, frequency, and memory timings, including:
- Voltage: Module VPP, VDD, VDDQ, Memory Controller Voltage
- Primary Timings: tCL, tRCD, tRP, tRAS, Command Rate
- Secondary Timings: tRC, tWR, tRFC1, tRFC2, tRFCsb
- Miscellaneous: Dynamic Memory Boost support, Real-Time Memory Frequency OC support, Vendor ID
XMP allows memory vendors such as G.SKILL to program higher performance settings onto the memory sticks. If the motherboard supports XMP, you can enable higher performance with a single BIOS setting. So, it saves you lots of manual configuration.

Regular viewers of the channel will know this particular kit is a bit finicky and doesn’t always run DDR5-7800 out of the box. The same occurred on this system, hence I reduced the memory frequency to DDR5-7600.
BIOS Settings & Benchmark Results
Upon entering the BIOS
- Switch to Advanced Mode view
- Go to the Ai Tweaker menu
- Set Performance Preferences to ASUS Advanced OC Profile
- Set Ai Overclock Tuner to XMP I
- Set ASUS MultiCore Enhancement to Enabled – Remove All Limits
- Set DRAM Frequency to DDR5-7600
Then save and exit the BIOS.
The CPU boost frequency with 1 active P-core is 5200 MHZ. The average boost frequency gradually trails off to 5000 MHz when all P-cores are active and to 4771 MHz when all P- and E-cores are active. Every P-core can boost to 5.2 GHz and every E-core can boost to 4.6 GHz in single-threaded workloads.

We re-ran the benchmarks and checked the performance increase compared to the default operation.




The Core Ultra 5 245K is the least powerful of all Arrow Lake K-SKU processors and thus not that limited by power or memory performance. That said, we still see a nice uplift across the board, primarily with multi-threaded applications and almost 10% in Counter Strike 2. The Geomean performance improvement is +3.71%, and we get a maximum improvement of +32.39% in PyPrime.
When running the OCCT CPU AVX2 Stability Test, the average CPU P-core effective clock is 4998 MHz with 1.102 volts and the average CPU E-core effective clock is 4601 MHz with 1.077 volts. The average CPU temperature is 70.0 degrees Celsius. The average CPU package power is 137.2 watts.

When running the OCCT CPU SSE Stability Test, the average CPU P-core effective clock is 4993 MHz with 1.100 volts and the average CPU E-core effective clock is 4589 MHz with 1.078 volts. The average CPU temperature is 70.0 degrees Celsius. The average CPU package power is 128.5 watts.

OC Strategy #2: CPU Overclock
In our second overclocking strategy, we finally overclock the CPU cores. For this we rely on two foundational overclocking technologies: Turbo Ratio Limit and Adaptive Voltage mode. Those technologies let us run the P-cores up to 5.6 GHz with 1.35V and the E-cores up to 4.9 GHz with 1.275V.
Intel Turbo Ratio Limit
Intel Turbo Ratio Limit is a technology that regulates the Turbo Boost frequency of an Intel processor based on the number of active cores.
Intel processors usually have two types of CPU core frequencies specified: the base frequency and the Turbo Boost frequency. The base frequency is also known as the “Maximum Non-Turbo Ratio” whereas the turbo frequency is usually referred to as the Turbo Ratio Limit.
The Turbo Ratio Limit is called a limit because it restricts the operating frequency rather than targets a frequency. Processors like the Core Ultra 5 245K have an upper core frequency ratio of 120X. Without the ratio limit, the CPU would boost all the way to the maximum frequency.
The tool is pretty flexible and can be programmed for various scenarios. The ratio limits are defined in the processor’s Machine Specific Registers (MSRs) by two parameters:
- The Turbo Ratio Limit
- The number of active cores
For CPUs like the Core Ultra 5 245K which have no more than 8 P-cores these registers are configured from 1-active P-core to 8-active P-cores. However, on platforms with core counts beyond eight cores, we can configure each register by target Turbo Boost Ratio and the number of active cores.

Furthermore, on hybrid designs like Alder Lake, Raptor Lake, or Arrow Lake, which all feature a combination of P-cores and E-cores, the Turbo Ratio Limit configuration is specified by core type. In other words: the applied ratio limit for the P-cores is independent from the limit of the E-cores.
For example, on the Core Ultra 5 245K the Turbo Ratio Limit specifies 52X when up to 2 P-cores are active, 50X when 3 or more P-cores are active, and 46X for any amount of active E-cores. In theory, if 2 P-cores and all E-cores are active, the P-cores would operate at 52X even though more than 2 cores in total are active.
Note that configuring the turbo ratio is not the same as configuring each core individually. When using turbo ratio limit, we determine an overclock according to CPU usage. For example, if a workload uses four cores, the CPU determines which cores should execute this workload and applies our set frequency to those cores.
The Turbo Ratio Limit configuration also has a couple of rules that must be followed:
- Each register must be defined by a target ratio and a number of active cores.
- The minimum allowed ratio limit is the maximum non-turbo ratio.
- The maximum allowed ratio limit is defined per architecture.
- On modern CPUs that’s 85X or 120X using extended ratio mode
- The ratio limit of a register must be equal to or lower than the ratio defined for the previous register .
- E.g. we cannot define 60X for up to 1 active core and 62X for up to 4 active cores.
- The core count of a register must be equal to or lower than the ratio defined for the previous register.
- E.g. we cannot define register 1 to define the ratio for up to 5 active cores and register 2 to define the ratio for up to 2 active cores
- The last register must always define the ratio limit for the highest available active cores of the processor SKU.
Intel Per Core Ratio Limit
Intel Per Core Ratio Limit allows you to set a maximum CPU Ratio for every P-core and E-core cluster individually. It is an extension of the Intel Turbo Boost Max 3.0 Technology introduced in 2016. It acts independently from the Turbo Ratio Limit, meaning that when you set a Per Core Ratio Limit, the core ratio will be restricted even if the Turbo Ratio Limit allows for a higher boost frequency.
The Per Core Ratio Limit plays an important role in the Arrow Lake overclocking process. It’s not only the ratio used in the V/F point configuration but also the ratio referenced by many other ratio tuning technologies.



In our case, we’ll use it to restrict the cores with less overclocking headroom to boost as high as the cores with great headroom.
Arrow Lake Voltage Topology
The voltage regulation for the P-cores is more complex than prior generations of Intel Core processors due to the introduction of the Digital Linear Voltage Regulator (DLVR). The DLVRs enable much lower voltage levels for the cores and ring but still rely on a dynamic external motherboard voltage regulator as the input voltage source.
Arrow Lake VccIA, VccCORE, & VccATOM
The external VccIA motherboard voltage regulator (MBVR) provides the input voltage for the individual P-core, E-core clusters, Ring, last-level cache (LLC), and E-core L2 cache. Each P-core, E-core cluster, and Ring has an individual Digital Linear Voltage Regulator (DLVR) between the VccIA rail and the IP blocks. That means each of the blocks can operate at its own voltage.

- VccCOREn is the DLVR powering an individual P-core.
- VccR is the DLVR powering the Ring and Last-Level Cache.
- VccATOMn is the DLVR powering an individual E-core cluster, which consists of four E-cores, and its L2 cache.
The DLVRs can also be bypassed. In that case, the IP blocks are running in so-called Power Gate (PG) mode. We’ll cover that later in the guide.
Core Ultra 5 245K V/F Curves
Each Core Ultra 5 245K P-core and E-core cluster also has its own V/F curve which is defined by seven (7) V/F points. The first six (6) V/F points are factory-fused, and the last point is mapped to the “OC Ratio.”

Here is the aggregate P-core V/F curve for my specific Core Ultra 5 245K. The voltage is about 731 mV at 800 MHz, then increases to 1.071V for VF Point 4 at 4.8 GHz, and ultimately ends at 1.178V for V/F Point 6 at 5.2 GHz. Note that each P-core has a different fused voltage for V/F Point 6 which ranges from 1.156V for Core 0 to 1.203V for Core 3.


Here is the aggregate E-core V/F curve for my specific Core Ultra 5 245K. The voltage is about 671 mV at 800 MHz, then increases to 0.785V for VF Point 4 at 3.0 GHz, and ultimately ends at 1.098V for V/F Point 6 at 4.6 GHz. While each E-core cluster can have a different fused voltage for V/F Point 6, for this particular CPU it’s the same at 1.098V.


Intel Adaptive Voltage Mode
Based on the VF curve, the CPU cores request an operating voltage using the SVID protocol from the CPU Power Control Unit (PCU). The PCU in turn configures the VccIA voltage rail and the individual DLVRs. There are two ways to configure the DLVR voltage:
- Adaptive mode is the standard mode of operation, which relies on the factory-fused voltage-frequency curves we discussed before.
- Override mode specifies a single static voltage across all ratios. It is mainly used for extreme overclocking where stability at high frequencies is the only consideration.
We can configure override and adaptive modes directly in the PCU by specifying a target voltage and a voltage offset for each mode.
In adaptive mode, the target voltage is mapped to a core’s “OC Ratio.” Each P-core and E-core cluster has its own “OC Ratio” which is defined by the Per Core Ratio Limit. This also matches V/F Point 7. You can configure the adaptive voltage and OC Ratio to any value; however, multiple rules enforce what ratio and voltage are actually set.
Rule #1: the voltage set for a given VF Point n must be higher than or equal to the voltage set for VF Point n-1.
That means the voltage for the OC Ratio, matching V/F Point 7, must be higher than or equal to the voltage for VF Point 6.
For example, let’s say you set the P-core Per Core Ratio Limit to 56X and the adaptive voltage to 1.1V. In that case, VF Point 7 will be programmed to 56X at 1.1V. However, the actual frequency will be 5.6 GHz with 1.178V, as that’s the voltage for VF Point 6.

Even if you set the voltage lower in BIOS, the PCU will override your configuration if it doesn’t follow the rules.
Rule #2: for ratios between the OC Ratio and the next highest factory-fused V/f point, the voltage is interpolated between the set adaptive voltage and the factory-fused voltage.
Let’s say we configure the P-core V/F OC Point to 56X and 1.40V. The target voltage for each P-core ratio between 52X and 56X is now interpolated between the P-core’s factory-fused voltage for 52X and the set adaptive voltage for 56X.

There are several ways to configure the adaptive voltage, including setting it for each P-core and E-core cluster individually. In this OC Strategy, we set a single, global adaptive voltage that’s used for every core’s “OC Ratio.”
Intel Thermal Velocity Boost Voltage Optimizations
Intel Thermal Velocity Boost is an Intel technology that exploits the fact that CPUs need less voltage to run a specific frequency when the operating temperature is lower. When this technology is enabled, the CPU automatically adjusts the operating voltage according to the operating temperature.
For example, for my Arrow Lake launch content, I collected data for the Core Ultra 9 285K to illustrate this behavior. As you can see from the data, with the P-core at 5.4 GHz, the operating voltage is 1.237V when the temperature is below 50 degrees Celsius. However, it increases to nearly 1.3V when the temperature approaches 100 degrees Celsius.

If you want manual control over the operating voltage to ensure stability, like when you’re trying to overclock, it’s prudent (but not mandatory) to disable this function.
Arrow Lake P-core and E-core Tuning Process
The manual tuning process for Arrow Lake CPU cores can seem difficult because there’s a wide range of workload and operating scenarios to test. I recommend first choosing an adaptive voltage you’re comfortable with, then finding the maximum stable single thread frequency for each P-core and E-core cluster, and lastly checking all-core stability.
Choosing the Voltage
The easiest way I find to determine an appropriate starting point for the adaptive voltage is by first considering the current maximum voltage and then adding 50 to 200mV.
For example, the default maximum voltage for this CPU is 1.2V for P-core 3, so I decided to add +150 mV headroom and set the P-core adaptive voltage to 1.35 V. For the E-cores, the maximum voltage is 1.1V so I also add +175 mV and set it to 1.275V.
Note that we want full control over the effective voltage, so make sure to disable any technologies that might adjust the operating voltage such as TVB or Advanced Voltage Offset.
1T Stability
After you’ve set your target adaptive voltage, you can find the maximum stable frequency for each P-core and E-core cluster at that voltage. The easiest way to do that is by setting the Turbo Ratio Limit to, for example, 60X, and then setting the Per Core Ratio Limit to the frequency you want to test. For example, 54X for the P-cores and 48X for the E-cores.
Now, you can run a stress of choice. I typically rely on the OCCT CPU Stress Test which has a core cycling function built in. But you can also run a custom application like Core Cycler or pick a different stress test. You can start with a 30 second quick test first to quickly find the upper limit, then longer test times to confirm stability.
When you’ve found the maximum stable frequency for each P-core and E-core cluster, you can adjust the Turbo Ratio Limit accordingly.
nT Stability
Finally, we need to check if the CPU is also stable in non-single-thread workloads. The easiest way to do this is by running your worst-case all-core workload which, in my case, is always 30 minutes of OCCT CPU AVX2 Stability Test.
You’ll typically find that the CPU cannot run all-core at the same frequency as it can run single-threaded workloads. If that’s the case, simply lower the Turbo Ratio Limit for all-core workloads until it’s stable.
In addition to the OCCT CPU AVX2 Stability Test, I generally also include three other workloads during all-core testing: Y-Cruncher, Cinebench R23, and AI Benchmark. While these three test are no replacement for the worst-case stress test, they highlight different kinds of instabilities – usually related to transitive loads.
For example, Cinebench R23 seems particularly useful to detect AVX-related nT instabilities. And AI Benchmark typically detects if the Per Core Ratio Limit is too high.
Final Result
With 1.35V adaptive voltage for the P-cores, I could increase P-core 0 and 1 to 5.5 GHz, P-core 2 and 3 to 5.6 GHz, and P-core 4 and 5 to only 5.3 GHz. I’ll get back to P-core 4 and 5 later in this guide. With 1.275V adaptive voltage for the E-cores, I could increase both E-core clusters to 4.9 GHz.


BIOS Settings & Benchmark Results
Upon entering the BIOS
- Switch to Advanced Mode
- Go to the Ai Tweaker menu
- Set Performance Preferences to ASUS Advanced OC Profile
- Set Ai Overclock Tuner to XMP I
- Set ASUS MultiCore Enhancement to Enabled – Remove All Limits
- Set Performance Core Ratio to By Core Usage
- Set 1-Core and 2-Core Ratio Limit to 56
- Set 3-Core and 4-Core Ratio Limit to 55
- Set 5-Core and 6-Core Ratio Limit to 53
- Enter the Specific Performance Core submenu
- Set Performance Core0 and Core1 Specific Ratio Limit to 55
- Set Performance Core2 and Core3 Specific Ratio Limit to 56
- Set Performance Core4 and Core5 Specific Ratio Limit to 53
- Leave the Specific Performance Core submenu
- Set Efficient Core Ratio to Sync All Cores
- Set All-Core Ratio Limit to 49
- Set DRAM Frequency to DDR5-7600
- Enter the Thermal Velocity Boost submenu
- Set TVB Voltage Optimizations to Disabled
- Leave the Thermal Velocity Boost submenu
- Enter the Performance Core V/F Point Offset submenu
- Set V/F Point Present Mode to All Core Mode
- Set V/F Point Voltage Control Mode to Manual Mode
- Leave the Performance Core V/F Point Offset submenu
- Enter the Efficient Core V/F Point Offset submenu
- Set V/F Point Present Mode to All Core Mode
- Set V/F Point Voltage Control Mode to Manual Mode
- Leave the Efficient Core V/F Point Offset submenu
- Set Performance Core DLVR Voltage to Adaptive Mode
- Set Additional Turbo mode Voltage to 1.350
- Set Efficient Core DLVR Voltage to Adaptive Mode
- Set Additional Turbo mode Voltage to 1.275
Then save and exit the BIOS.
The CPU boost frequency with 1 active P-core is 5600 MHZ. The average boost frequency gradually trails off to 5300 MHz when all P-cores are active and to 5071 MHz when all P- and E-cores are active. In single-threaded applications, two P-cores can boost to 5.6 GHz, two can boost up to 5.5 GHz, and 2 to 5.3 GHz. Every E-core can boost to 4.9 GHz.

We re-ran the benchmarks and checked the performance increase compared to the default operation.




As we significantly increased the operating frequency of both the P-cores and the E-cores, we also see a decent performance uplift across the board as games, single-threaded, and multi-threaded workloads all benefit from our overclock configuration. The Geomean performance improves by another 3.65 percentage points, and we get a maximum improvement of +34.35% in PyPrime.
When running the OCCT CPU AVX2 Stability Test, the average CPU P-core effective clock is 5291 MHz with 1.252 volts and the average CPU E-core effective clock is 4901 MHz with 1.277 volts. The average CPU temperature is 90.0 degrees Celsius. The average CPU package power is 209.1 watts.

When running the OCCT CPU SSE Stability Test, the average CPU P-core effective clock is 5291 MHz with 1.252 volts and the average CPU E-core effective clock is 4891 MHz with 1.277 volts. The average CPU temperature is 91.0 degrees Celsius. The average CPU package power is 199.0 watts.

OC Strategy #3: Data Fabric Tuning
In our third overclocking strategy, we delve into tuning the data fabric which consists of the Ring, the NoC in the NGU, and the CPU D2D interface. By increasing the operating voltage, we increase their respective frequency by 600, 600, and 1500 MHz.
Arrow Lake Ring
The Ring fabric provides the data fabric interface between the various Compute IP blocks in the Compute Tile, the last-level cache, and the SOC-Compute D2D interface.

Arrow Lake Ring Clocking Topology
The Ring reference clock frequency is generated internally by the CPU PLL. This clock affects all IP blocks in the Compute Tile, including the P-cores, E-cores, and Ring. This PLL can be linked to the SoC PLL when you run in synchronous mode or work independently if you run in asynchronous mode.



The reference clock is multiplied by the Ring ratio to achieve the final clock frequency. It operates independently from the P-cores and the E-cores. The default ratio is 38X, which yields a 3.8 GHz operating frequency.
Arrow Lake Ring Voltage Topology
The voltage regulation for the Ring is more complex than prior generations of Intel Core processors due to the introduction of the DLVR. The DLVR enables much lower voltage levels for the Ring but still relies on a dynamic external motherboard voltage regulator as the input voltage source.

As we discussed earlier in the guide, the external VccIA motherboard voltage regulator (MBVR) provides the input voltage for DLVRs of the individual P-core, E-core clusters, Ring, last-level cache (LLC), and E-core L2 cache.
- VccCOREn is the DLVR powering an individual P-core.
- VccR is the DLVR powering the Ring and Last-Level Cache.
- VccATOMn is the DLVR powering an individual E-core cluster, which consists of four E-cores, and its L2 cache.
The DLVRs can also be bypassed. In that case, the IP blocks are running in so-called Power Gate (PG) mode. We’ll cover that later in the guide.
Core Ultra 5 245K Ring V/F Curve
The Core Ultra 5 245K Ring has its own V/F curve which is defined by up to seven (7) V/F points. The first six (6) V/F points are factory-fused, and the last point is mapped to the “OC Ratio.” Oddly enough, while the default Ring frequency is 3.8 GHz, the V/F curve is actually defined up to 3.9 GHz!

Here is the Ring V/F curve for my specific Core Ultra 5 245K. The voltage is about 818 mV at 800 MHz all the way up to 2.8 GHz, then increases nearly linearly to 1.136V for VF Point 6 at 3.9 GHz.

Adaptive Voltage Mode
Similar to the P-cores and E-cores, the Ring requests an operating voltage using the SVID protocol from the CPU Power Control Unit (PCU) based on its VF curve. The PCU in turn configures the VccIA voltage rail and the individual DLVRs.
The voltage configuration of the Ring is identical to that of the P-cores, including the Adaptive and Override modes, and the specific rules governing the adaptive voltage mode which I covered at length in the previous OC Strategy.
Arrow Lake NGU / NoC
NGU stands for “Next Generation Uncore” and is the successor to the uncore we know from previous generation Intel processors. The NGU fabric – sometimes called sub-system – includes several subcomponents such as the network on chip (NoC) and UFI bridges. It’s located on the SoC tile.

On Arrow Lake-S, NGU overclocking is essentially NoC overclocking. The NOC fabric is the primary communication bridge between the various IP blocks on the chip such as the memory controller, the CPU cores (via D2D), graphics (via D2D), and so on.
Arrow Lake NGU Clocking Topology
The NGU reference clock frequency is generated internally by the SoC PLL. However, it can also be clocked with an external clock generator providing the reference clock for the SoC PLL. This clock affects nearly all the IP blocks of Arrow Lake, except for those in the Compute Tile and the PCIe/DMI links.


The reference clock is multiplied by the NGU ratio to achieve the final clock frequency. The default ratio is 26X, which yields a 2.6 GHz operating frequency.
Arrow Lake NGU Voltage Topology
The external VccSA MBVR powers several parts of the SOC dielet, including the NGU. Unlike Compute IP, the parts of the SOC dielet are not powered using DLVR. So, power delivery is identical to previous architectures.

The most relevant parts powered by the VccSA voltage rail are the system agent, the NoC, the NPU, and the memory controller. The voltage configuration of the VccSA voltage rail is rather complicated. Since multiple IP domains share the voltage rail, the VccSA voltage is set based on the highest requested voltage from the various connected IP blocks.
The NoC has its own V/F curve which is defined by up to four (4) V/F work points. The first three (3) V/F points (at 11X, 23X, and 26X) are factory-fused and the last point is mapped to the “OC Ratio.” Unfortunately, that’s as much as we can gather regarding the default V/F curve. It’s not easy to separate the NGU SVID request based on the VccSA behavior.

Based on the work points, the NGU requests an operating voltage from the VccSA voltage rail using the SVID protocol. However, there’s a second way to voltage configuration: ignore the SVID voltage requests and calculations, and program the VccSA voltage regulator directly over PMBus. This process effectively allows us to take full control over the voltage set by the VccSA voltage rail.


This approach is a very traditional way of overclocking whereby you set a fixed output voltage and then use an appropriate VRM load-line setting – if available – to reduce the operating voltage in higher load scenarios. The load-line configuration isn’t particularly useful for SA voltage rail.
D2D
D2D stands for Die-to-Die. It is the interface between the various tiles on the Arrow Lake package. There are three D2D links connecting the various tiles on the Arrow Lake package:
- SOC-Compute (H-IDI protocol) – P-core, E-core, Ring
- SOC-Graphics (CXL protocol) – Integrated Graphics
- SOC-IOE (PSF protocol) – IO extension
On Arrow Lake, only the SOC-Compute D2D can be overclocked. The base frequency is 2.1 GHz.
D2D Clocking Topology
The D2D reference clock frequency is generated internally by the SoC PLL. However, it can also be clocked with an external clock generator providing the reference clock for the SoC PLL. This clock affects nearly all the IP blocks of Arrow Lake, except for those in the Compute Tile and the PCIe/DMI links.


The reference clock is multiplied by the D2D ratio to achieve the final clock frequency. As said, we can only adjust the SOC-Compute D2D frequency. The default ratio is 21X, which yields a 2.1 GHz operating frequency. The maximum configurable ratio is 40X. The frequency can only be set at boot and cannot be changed in the operating system.
D2D Voltage Topology
The external 0.77V VnnAON voltage rail powers several internal voltages, including the D2D interfaces. The VnnAON voltage is pretty important for Arrow Lake CPUs as it is part of the voltage multiplexer for many IP blocks, including the cores and ring, typically serving as the floor voltage in power-saving scenarios.

I don’t suggest increasing it above 1.0V since it provides little additional benefit for overclocking and performance. Furthermore, increasing the VnnAON voltage can also cause issues when cold booting the system. Fortunately, ASUS has included an option called “High d2d cold boot workaround” in the BIOS that can help alleviate some of the booting issues with increased VnnAON voltages.

Data Fabric Tuning Process
Tuning the data fabric is a matter of testing each component systematically. I recommend first picking target voltages for each of the components and setting those in the BIOS with each component set to its default frequency. So:
Component | Default | Initial Config |
Ring | 39X at 1.136 V | 39X at 1.300 V |
NGU | 26X at 1.050 V | 26X at 1.300 V |
D2D | 21X at 0.770 V | 21X at 1.000 V |
Then I increase the frequency for each component until I find instability. The initial tests can be very quick. For example, I’ll run a 30 second cycle of Y-Cruncher FFT Component tester to find the initial upper limit for each component.
Component | Default | Initial Config | 1st Test | 2nd Test | 3rd Test |
Ring | 39X at 1.136 V | 39X at 1.300 V | Increase Ring | 39X at 1.300 V | 39X at 1.300 V |
NGU | 26X at 1.050 V | 26X at 1.300 V | 26X at 1.300 V | Increase NGU | 26X at 1.300 V |
D2D | 21X at 0.770 V | 21X at 1.000 V | 21X at 1.000 V | 21X at 1.000 V | Increase D2D |
When I know the upper limit, I’ll set all target ratios and do longer stints of stability testing including the introduction of other tests. I find that, typically, Cinebench R23, Y-Cruncher Benchmark & Component Tester, and AI Benchmark are very sensitive to data fabric overclocking.
This process might take a bit longer, especially if you’re trying to find the maximum stable setting. When I’m satisfied with the stability testing, of course it also has to pass all the other benchmarks in our benchmark suite.
Ultimately, I ended up with a 4.4 GHz Ring, 3.2 GHz NGU, and 3.6 GHz D2D.
Component | Default | Initial Config | Final Config |
Ring | 38X at 1.076 V | 38X at 1.300 V | 44X at 1.300 V |
NGU | 26X at 1.050 V | 26X at 1.300 V | 32X at 1.300 V |
D2D | 21X at 0.770 V | 21X at 1.000 V | 36X at 1.000 V |
BIOS Settings & Benchmark Results
Upon entering the BIOS
- Switch to Advanced Mode view
- Go to the Ai Tweaker menu
- Set Performance Preferences to ASUS Advanced OC Profile
- Set Ai Overclock Tuner to XMP I
- Set ASUS MultiCore Enhancement to Enabled – Remove All Limits
- Set Performance Core Ratio to By Core Usage
- Set 1-Core and 2-Core Ratio Limit to 56
- Set 3-Core and 4-Core Ratio Limit to 55
- Set 5-Core and 6-Core Ratio Limit to 53
- Enter the Specific Performance Core submenu
- Set Performance Core0 and Core1 Specific Ratio Limit to 55
- Set Performance Core2 and Core3 Specific Ratio Limit to 56
- Set Performance Core4 and Core5 Specific Ratio Limit to 53
- Leave the Specific Performance Core submenu
- Set Efficient Core Ratio to Sync All Cores
- Set All-Core Ratio Limit to 49
- Set DRAM Frequency to DDR5-7600
- Enter the Thermal Velocity Boost submenu
- Set TVB Voltage Optimizations to Disabled
- Leave the Thermal Velocity Boost submenu
- Enter the Performance Core V/F Point Offset submenu
- Set V/F Point Present Mode to All Core Mode
- Set V/F Point Voltage Control Mode to Manual Mode
- Leave the Performance Core V/F Point Offset submenu
- Enter the Efficient Core V/F Point Offset submenu
- Set V/F Point Present Mode to All Core Mode
- Set V/F Point Voltage Control Mode to Manual Mode
- Leave the Efficient Core V/F Point Offset submenu
- Enter the Tweaker’s Paradise submenu
- Set High d2d cold boot workaround to Enabled
- Leave the Tweaker’s Paradise submenu
- Set Max. CPU Cache Ratio to 44
- Set NGU Ratio to 32
- Set CPU D2D Ratio to 36
- Set Performance Core DLVR Voltage to Adaptive Mode
- Set Additional Turbo mode Voltage to 1.350
- Set Efficient Core DLVR Voltage to Adaptive Mode
- Set Additional Turbo mode Voltage to 1.275
- Set Ring DLVR Voltage to Adaptive Mode
- Set Additional Turbo mode Voltage to 1.300
- Set CPU System Agent Voltage to Manual Mode
- Set CPU System Agent Voltage Override to 1.300
- Set VNNAON 0.77v Voltage to Manual Mode
- Set VNNAON Voltage Override to 1.000
Then save and exit the BIOS.
We re-ran the benchmarks and checked the performance increase compared to the default operation.




As we significantly increased the operating frequency of the Ring, NGU, and D2D, we also see a decent performance uplift across the board as games, single-threaded, and multi-threaded workloads all benefit from our overclocked configuration. The Geomean performance improves by another 1.84 percentage points, and we get a maximum improvement of +44.54% in PyPrime.
Tuning the data fabric had a minor impact on the OCCT Stability Test, increasing the average CPU temperature by about up to 3 degrees Celsius and increasing average CPU package power by up to 9 watts.


OC Strategy #4: Beyond Voltage Limit
In our fourth overclocking strategy, I try to squeeze more performance out of the CPU cores by increasing the imposed voltage limits and adopting granular ratios. To accommodate higher voltages, we switch to per core voltage configuration and use a static VccIA input voltage.
That helps us further increase the maximum P-core frequency to 5633 MHz and the maximum E-core frequency to 5.1 GHz.
Arrow Lake Voltage Limits
To safeguard the processor, for the first time, Intel imposes strict voltage limits for several IP blocks, including the P-cores and E-cores. This voltage limit effectively prevents the cores from requesting a higher voltage from the PCU.
By default, the voltage limit for the P-cores and E-cores is +200 mV above the lowest VID for the P-cores’ and E-core’s V/F Point 6. For this CPU’s P-cores, that’s 1.156V + 200 mV = 1.356V and for the E-cores it’s 1.098 V + 200mV = 1.298V. However, we can manually increase that to +300 mV under ambient conditions, so 1.456V and 1.398V respectively. If you try setting the limit above the approved limit, the PCU will automatically adjust it to the highest allowed limit. If you disable voltage limits and the temperature is above 10 degrees Celsius, the CPU will operate in “safe mode” and limit the frequency to 400 MHz.

Intel Per Core Voltage
Intel Per Core Voltage allows you to set a specific target voltage for every individual P-core and E-core cluster inside your CPU. The tool is an extension of DLVR mode as it only works when DLVR is enabled.
Similar to the global voltage mode, you can configure the Per Core Voltage in adaptive mode and override mode, specifying a voltage for the defined Per Core Ratio Limit or across the V/F curve respectively.
The Per Core Voltage implementation for Arrow Lake is slightly different than prior platforms as each P-core and E-core cluster now has its own “OC Ratio.” Functionally, that means every Per Core Voltage is mapped to a respective Per Core Ratio Limit and, thus, also serves as the base voltage for V/F Point 7.
The standard rules for adaptive voltage mode which we discussed in OC Strategy #2 still apply. As a consequence, it means that each P-core and E-core cluster’s V/F curve is truly independent as voltage interpolation is done for each core individually.
Arrow Lake Granular Ratios
Granular Ratios are a brand-new overclocking feature for Arrow Lake.

It adjusts the Per Core Ratio Limit by letting you set the CPU frequency in steps of 16.67 and 33.33 MHz. The granular ratios can only be configured in reference to the Per Core Ratio Limit, not as a Turbo Ratio limit. That’s because, technically, the granular ratios aren’t set directly but instead “downbinned” from the Per Core Ratio Limit.

For example, let’s say you set a granular ratio of 60.16X. In that case, the Per Core Ratio Limit is set to 61X and then “downbinned” by 5 steps of 16.67 MHz (100 MHz divided by 6). That is important to keep in mind in case you’re also using other ratio configuration technologies.
It’s also important to keep in mind when using adaptive voltage mode, because the adaptive voltage maps to the “OC Ratio.” In our previous example, where we use a 60.16X granular ratio, let’s say we also set an adaptive voltage of 1.45V. In this case, the adaptive voltage maps to 61X and also applies to any ratio between 60X and 61X.
Arrow Lake VccIA MBVR
As we discussed a couple times already in this guide, external VccIA motherboard voltage regulator (MBVR) provides the input voltage for the VccCOREn, VccATOMn, and the VccR DLVRs.

It is a dynamic voltage that’s configured by the CPU PCU based on the voltage requests from all the different IP blocks powered by these DLVRs. However, we can also manually override the VccIA voltage while maintaining DLVR mode. I decided for this OC Strategy to try a static VccIA voltage mode for two reasons.
- With the elevated voltages, the VccIA maximum voltage jumps up quite a bit up to over 1.6V.
- I found that the system stability was more predictable, making it easier to eke out additional frequency.
Since the maximum voltage for the VccIA-powered DLVRs is 1.45V (P-cores), I settled on a static VccIA voltage of 1.525 V. Do note that you must also consider the VccIA VR load-line, just like with previous architectures. I fixed the load-line to level 6 to have a flatter curve across all loads.
Arrow Lake P-core and E-core Finetuning Discussion
I follow a similar testing process as in OC Strategy #3. The main difference is that there’s a bit more finessing involved when you’re near the maximum overclock.
In the end, I could achieve 5633 MHz for P-cores 2 and 3 at 1.45V, 5533 MHz for P-cores 0 and 1 at 1.40V, and 5.3 GHz for P-cores 4 and 5 with 1.20V. The two last P-cores were behaving quite weird because the voltage limit was 1.4V – like the E-cores – and not 1.45V like the other P-cores. Also, the overclocking headroom did not scale with increased voltage. So, the maximum frequency is 5.3 GHz whether I set 1.2V or 1.4V. With 1.40V adaptive voltage for the E-cores, I could increase both E-core clusters to 5.1 GHz.


In addition to the increased 1T boost, I could also increase the all-core Turbo Ratio Limit to 56X for the P-cores and 50X for the E-cores.
BIOS Settings & Benchmark Results
Upon entering the BIOS
- Switch to Advanced Mode view
- Go to the Ai Tweaker menu
- Set Performance Preferences to ASUS Advanced OC Profile
- Set Ai Overclock Tuner to XMP I
- Set ASUS MultiCore Enhancement to Enabled – Remove All Limits
- Set Performance Core Ratio to By Core Usage
- Set 1-Core and 2-Core Ratio Limit to 57
- Set 3-Core to 6-Core Ratio Limit to 56
- Enter the Specific Performance Core submenu
- Set Performance Core0 and Core1 Specific Ratio Limit to 55.33
- Set Performance Core2 and Core3 Specific Ratio Limit to 56.33
- Set Performance Core4 and Core5 Specific Ratio Limit to 53
- Set Performance Core0 to Core5 Specific Voltage to Adaptive Mode
- Set Additional Turbo Mode CPU P-core0 and P-Core1 Voltage to 1.400
- Set Additional Turbo Mode CPU P-core2 and P-Core3 Voltage to 1.450
- Set Additional Turbo Mode CPU P-core4 and P-Core5 Voltage to 1.200
- Leave the Specific Performance Core submenu
- Set Efficient Core Ratio to By Core Usage
- Set Efficient 1-Core to 5-Core Ratio Limit to 51
- Set Efficient 6-Core to 8-Core Ratio Limit to 50
- Enter the Specific Efficient Core submenu
- Set Efficient Core Group0 and Group1 Specific Ratio Limit to 51
- Set Efficient Core Group0 and Group1 Specific Voltage to Adaptive Mode
- Set Additional Turbo Mode CPU Efficient Core Group0 and Group1 Voltage to 1.400
- Leave the Specific Efficient Core submenu
- Set DRAM Frequency to DDR5-7600
- Enter the DIGI+ VRM submenu
- Set CPU Load-line Calibration to Level 6
- Leave the DIGI+ VRM submenu
- Enter the Thermal Velocity Boost submenu
- Set TVB Voltage Optimizations to Disabled
- Leave the Thermal Velocity Boost submenu
- Enter the Max Voltage Limits submenu
- Set P-Core Max Voltage Limits to 1.450
- Set E-Core Max Voltage Limits to 1.400
- Leave the Max Voltage Limits submenu
- Enter the Performance Core V/F Point Offset submenu
- Set V/F Point Present Mode to All Core Mode
- Set V/F Point Voltage Control Mode to Manual Mode
- Leave the Performance Core V/F Point Offset submenu
- Enter the Efficient Core V/F Point Offset submenu
- Set V/F Point Present Mode to All Core Mode
- Set V/F Point Voltage Control Mode to Manual Mode
- Leave the Efficient Core V/F Point Offset submenu
- Enter the Tweaker’s Paradise submenu
- Set High d2d cold boot workaround to Enabled
- Leave the Tweaker’s Paradise submenu
- Set Max. CPU Cache Ratio to 44
- Set NGU Ratio to 32
- Set CPU D2D Ratio to 36
- Set Actual VRM Core Input Voltage to Manual Mode
- Set CPU Core Voltage Override to 1.525
- Set Ring DLVR Voltage to Adaptive Mode
- Set Additional Turbo mode Voltage to 1.300
- Set CPU System Agent Voltage to Manual Mode
- Set CPU System Agent Voltage Override to 1.300
- Set VNNAON 0.77v Voltage to Manual Mode
- Set VNNAON Voltage Override to 1.000
Then save and exit the BIOS.
The CPU boost frequency with 1 active P-core is 5633 MHZ. The average boost frequency gradually trails off to 5478 MHz when all P-cores are active and to 5205 MHz when all P- and E-cores are active. In single-threaded applications, two P-cores can boost to 5633 MHz, two can boost up to 5533 GHz, and 2 to 5.3 GHz. Every E-core can boost to 5.1 GHz.

We re-ran the benchmarks and checked the performance increase compared to the default operation.




While the additional voltage doesn’t add much P-core top speed, the additional 200 MHz for the E-cores helps lift the performance in multi-threaded workloads. The Geomean performance improves by another 1.38 percentage points, and we get a maximum improvement of +44.30% in PyPrime.
When running the OCCT CPU AVX2 Stability Test, the average CPU P-core effective clock is 5471 MHz with 1.353 volts and the average CPU E-core effective clock is 5001 MHz with 1.333 volts. The average CPU temperature is 97.0 degrees Celsius. The average CPU package power is 280.4 watts.

When running the OCCT CPU SSE Stability Test, the average CPU P-core effective clock is 5471 MHz with 1.353 volts and the average CPU E-core effective clock is 4989 MHz with 1.333 volts. The average CPU temperature is 97.0 degrees Celsius. The average CPU package power is 264.1 watts.

OC Strategy #5: DRAM Tuned
In our fifth overclocking strategy, we try to tune the memory sub system and adjust the DRAM timings to see if it has any impact on system performance. For this I rely on the ASUS Memory Presets from the Z890 Apex and manual timing adjustments. It ultimately brings us DDR5-8000 and an increase of more than 20% in memory copy bandwidth.
ASUS Memory Presets
ASUS Memory Presets is an ASUS overclocking technology that provides you with a selection of memory tuning presets for certain memory ICs. The presets will adjust the memory timings and voltages.
Not all boards have Memory Presets available – for example, this ROG Strix Z890-I Gaming. Luckily, I had a Z890 Apex on hand and could copy over the timings from the Hynix 8400 1.5 2x16GB ADIE profile. For your reference, you can find the relevant timings below.

DRAM Tuning
It’s of course not a given that copying over timings will work with any 2x16GB Hynix kit. So, to start the tuning I first set a low memory frequency like DDR5-6000 with the new memory timings and check if it boots and is stable.
Then, I gradually increase the memory frequency until the point of instability. Now, I’m aware there’s a lot of discussion about what exactly constitutes memory stability, but I’ve always relied on 1h of OCCT Memory Stress Test. To my surprise, I found that the memory was now stable at DDR5-8000. Here is my final memory configuration:

After the tuning, our AIDA64 performance improved quite significantly. We got about +50% extra bandwidth and +25% better latency by enabling XMP. Tuning the data fabric, we added a couple more percentage of bandwidth and improved the latency by almost 20%. The tuned memory then added another 20% extra write and copy bandwidth while maintaining the same latency.

Benchmark Results
We re-ran the benchmarks and checked the performance increase compared to the default operation.




Tuning the memory timings and adding a little bit of frequency doesn’t have the enormous impact some would expect. However, it’s nonetheless interesting we get a good performance bump across the board – both in single threaded as well as multi-threaded workloads. The Geomean performance improves by another 1.42 percentage points, and we get a maximum improvement of +56.18% in PyPrime.
OC Strategy #6: Power Gate Mode
In our final overclocking strategy, we explore Power Gate Mode and see if it can improve our CPU core overclock. With the static voltage provided to the compute tile, we can increase the maximum CPU frequency of some P-cores to 5.6 GHz, and we get about 50 MHz extra in all core workloads.
VccIA Power Gate SVID Mode
In Power Gate Mode, all the DLVRs tied to the VccIA voltage rail are bypassed and the connected IP blocks are powered directly by the VccIA voltage rail. That includes the P-cores, E-core clusters and their cache, the Ring, and the last-level cache. Power Gate mode is basically how the VccIA rail worked on previous generation Raptor Lake processors. For Arrow Lake, it works … but it’s a little complicated.
To make a long story short: when the P-cores, E-cores, and Ring request their voltage to the CPU PCU, they account for a ton of other compensations including voltage droop, AVX Guardband, Thermal Velocity Boost voltage optimizations, etc. The result is that the actual voltage provided from the VccIA voltage rail to the IP blocks is relatively high!

For example, here are the voltages with an Arrow Lake CPU running a light all-core workload.

We can interpret this as follows: the P-core, E-core, and Ring request a voltage to the PCU to ensure it’ll run at 1.25V, 1.15V, and 1.2V respectively. The PCU then adds compensation for the load-lines, CEP, TVB, AVX, AC LL, DLVR efficiency losses, etc. At the end of the calculation, the PCU determines the VccIA voltage rail should provide 1.53V input voltage to the DLVRs.
If we were to switch to Power Gate mode but maintain the same mechanism for calculating the required voltage, then the VccIA voltage rail would effectively provide 1.43V to the P-cores, E-cores, and Ring. That’s obviously way too high and would quickly result in an overheating system. But this would be how voltage was configured on previous-generation Raptor Lake processors.
VccIA Power Gate PMBus Mode
Fortunately, there’s another way to approach Power Gate Mode voltage configuration: ignore the SVID voltage requests and calculations, and program the VccIA voltage regulator directly using PMBus. This process effectively allows us to take full control over the voltage set by the VccIA voltage rail.

This approach is a very traditional way of overclocking whereby you set a fixed output voltage and use an appropriate VRM load-line setting to reduce the operating voltage in higher load scenarios.
Let’s have a look at how the tuning process looks.
Power Gate Mode Banned
But before we continue, we must talk about the elephant in the room: Power Gate Mode will not be available for ambient overclocking in the future. Or at the very least, that’s Intel’s plan. The real reason is not known but it’s probably got something to do with Power Gate Mode enabling voltages much higher than the DLVR limits. That could – in theory – cause harm to the CPU.

My opinion on this matter is clear: just like anything related to overclocking, enabling Power Gate Mode is not in-spec behavior, voids the warranty, and may cause damage to your processor. The decision whether to accept the risk should be up to the customer that purchased the product, not Intel. I don’t need someone sitting in an office cubicle far removed from my workspace to tell me what I can and cannot do with the hardware I paid for.
With that out of the way, I also want to briefly touch on why Power Gate Mode is still available on some motherboards with newer BIOSes. To keep it short: while the latest firmware package from Intel doesn’t officially allow for Power Gate mode to be enabled, since it was available on older code it’s possible for motherboard vendors to rely on older firmware to retain support.

Think of it like the continuing the support for non-K overclocking or AVX512 on Alder Lake processors. Similarly, motherboard vendors can re-use older dCode firmware to continue PG Mode support.
Power Gate Mode Tuning
The tuning process with Power Gate is similar to what we did in OC Strategy #2, with one major difference. Instead of relying on the CPU V/F curve, we override it with a static voltage and control the voltage under high load with an appropriate VR load-line.
Choosing the Voltage
The easiest way to choose an appropriate VccIA voltage for Power Gate mode is by first choosing the maximum voltage for 1T workloads and then afterwards configuring a VR load-line to stabilize nT workloads.
In this case, we can simply set the VccIA voltage to 1.45V which is equal to the P-core DLVR voltage limit and 50mV more than the E-core DLVR voltage limit. Now, we test 1T stability.
1T Tuning
Similar to what we did in OC Strategy #2, we can first set the Turbo Ratio Limit to a high enough value (like 60X), then use the Per Core Ratio Limit to check stability for each P-core and E-core cluster.
With 1.45V static voltage for the P-cores, I could increase P-core 0 and 1 to 5.55 GHz and P-core 2 to 5 to 5.6 GHz. It’s especially surprising that P-cores 4 and 5 were a lot more stable in PG mode than in DLVR mode. With 1.45V static voltage for the E-cores, I achieve the same 5.1 GHz overclock for both E-core clusters as there’s no additional overclocking headroom compared to DLVR mode.


nT Tuning
The crucial part of all-core tuning is managing the output voltage with an appropriate VR load-line. The process to figure it out is pretty simply: set the Turbo Ratio Limit for all-core to the maximum Per Core Ratio Limit, then check stability.
If unstable, increase the VR load-line. If you hit TjMax, reduce the VR load-line and/or reduce the Turbo Ratio Limit.
I found there was no difference between DLVR and Power Gate mode for the all-core Turbo Ratio limit. So, I could set it to 56X for the P-cores and 50X for the E-cores. However, there’s a difference in effective all-core frequency because P-cores 4 and 5 can now run at 5.6 GHz instead of the 5.3 GHz with DLVR mode.
BIOS Settings & Benchmark Results
Upon entering the BIOS
- Switch to Advanced Mode
- Go to the Ai Tweaker menu
- Set Performance Preferences to ASUS Advanced OC Profile
- Set Ai Overclock Tuner to XMP I
- Set ASUS MultiCore Enhancement to Enabled – Remove All Limits
- Set Performance Core Ratio to By Core Usage
- Set 1-Core to 6-Core Ratio Limit to 56
- Enter the Specific Performance Core submenu
- Set Performance Core0 Specific Ratio Limit to 55.50
- Set Performance Core2 to Core5 Specific Ratio Limit to 56
- Leave the Specific Performance Core submenu
- Set Efficient Core Ratio to By Core Usage
- Set Efficient 1-Core to 5-Core Ratio Limit to 51
- Set Efficient 6-Core to 8-Core Ratio Limit to 50
- Enter the Specific Efficient Core submenu
- Set Efficient Core Group0 and Group1 Specific Ratio Limit to 51
- Leave the Specific Efficient Core submenu
- Set DRAM Frequency to DDR5-8000
- Enter the DRAM Timing Control submenu
- Set the memory timings according to your specific kit
- Leave the DRAM Timing Control submenu
- Enter the DIGI+ VRM submenu
- Set CPU Load-line Calibration to Level 6
- Leave the DIGI+ VRM submenu
- Enter the Tweaker’s Paradise submenu
- Set High d2d cold boot workaround to Enabled
- Leave the Tweaker’s Paradise submenu
- Set Max. CPU Cache Ratio to 45
- Set NGU Ratio to 32
- Set CPU D2D Ratio to 36
- Set Actual VRM Core Input Voltage to Manual Mode
- Set CPU Core Voltage Override to 1.45
- Set CPU System Agent Voltage to Manual Mode
- Set CPU System Agent Voltage Override to 1.300
- Set VNNAON 0.77v Voltage to Manual Mode
- Set VNNAON Voltage Override to 1.000
Then save and exit the BIOS.
The CPU boost frequency with 1 active P-core is 5600 MHZ. The average boost frequency gradually trails off to 5583 MHz when all P-cores are active and to 5250 MHz when all P- and E-cores are active. In single-threaded applications, four P-cores can boost to 5600 MHz and two to 5550 MHz. Every E-core can boost to 5.1 GHz.

We re-ran the benchmarks and checked the performance increase compared to the default operation.




While Power Gate mode isn’t officially supported anymore, my experience proves it has a place in Intel’s overclocking toolkit for regular users. For some reason, PG mode suddenly enabled the overclocking headroom for P-cores 4 and 5 which added extra multi-thread performance. The performance difference with DLVR mode isn’t huge but it’s a lot less effort to get the same results. The Geomean performance improves by another 0.24 percentage points, and we get a maximum improvement of +58.09% in PyPrime.
When running the OCCT CPU AVX2 Stability Test, the average CPU P-core effective clock is 5578 MHz, and the average CPU E-core effective clock is 5001 MHz with 1.368 volts. The average CPU temperature is 95.0 degrees Celsius. The average CPU package power is 284.5 watts.

When running the OCCT CPU SSE Stability Test, the average CPU P-core effective clock is 5575 MHz, and the average CPU E-core effective clock is 4984 MHz with 1.376 volts. The average CPU temperature is 94.0 degrees Celsius. The average CPU package power is 261.2 watts.

Intel Core Ultra 5 245K: Conclusion
Let’s wrap this up.
The Core Ultra 5 245K is my first attempt at dialing in a daily overclock with Arrow Lake. It’s been an interesting journey with ups and downs.
On the upside, it seems there’s quite a bit of overclocking headroom for both P-cores and E-cores. Furthermore, it seems that every part of Arrow Lake can add performance, whether that’s the CPU cores, the Ring, NGU, memory, and so on.
On the downside, it does seem like the CPU cores hit a frequency wall at some point. So, there’s not much – if anything – to be gained from using technologies like OCTVB. That’s a pity because I would’ve loved to see 6 GHz on Arrow Lake even if it’s just idling at desktop.
Anyway, that’s it for this guide. I’m already working on the next Arrow Lake overclocking guide so stay tuned if you’re interested in the Core Ultra 7 and Ultra 9.
I want to thank my Patreon supporters for supporting my work. If you have any questions or comments, please drop them in the comment section below.
See you next time!
Peter
Thank you. Looking forward to your Ultra 9 overclocking guide.